1 // Physical memory layout 2 3 // qemu -machine virt is set up like this, 4 // based on qemu's hw/riscv/virt.c: 5 // 6 // 00001000 -- boot ROM, provided by qemu 7 // 02000000 -- CLINT 8 // 0C000000 -- PLIC 9 // 10000000 -- uart0 10 // 10001000 -- virtio disk 11 // 80000000 -- boot ROM jumps here in machine mode 12 // -kernel loads the kernel here 13 // unused RAM after 80000000. 14 15 // the kernel uses physical memory thus: 16 // 80000000 -- entry.S, then kernel text and data 17 // end -- start of kernel page allocation area 18 // PHYSTOP -- end RAM used by the kernel 19 20 // qemu puts UART registers here in physical memory. 21 #define UART0 0x10000000L 22 #define UART0_IRQ 10 23 24 // virtio mmio interface 25 #define VIRTIO0 0x10001000 26 #define VIRTIO0_IRQ 1 27 28 // core local interruptor (CLINT), which contains the timer. 29 #define CLINT 0x2000000L 30 #define CLINT_MTIMECMP(hartid) (CLINT + 0x4000 + 8*(hartid)) 31 #define CLINT_MTIME (CLINT + 0xBFF8) // cycles since boot. 32 33 // qemu puts platform-level interrupt controller (PLIC) here. 34 #define PLIC 0x0c000000L 35 #define PLIC_PRIORITY (PLIC + 0x0) 36 #define PLIC_PENDING (PLIC + 0x1000) 37 #define PLIC_MENABLE(hart) (PLIC + 0x2000 + (hart)*0x100) 38 #define PLIC_SENABLE(hart) (PLIC + 0x2080 + (hart)*0x100) 39 #define PLIC_MPRIORITY(hart) (PLIC + 0x200000 + (hart)*0x2000) 40 #define PLIC_SPRIORITY(hart) (PLIC + 0x201000 + (hart)*0x2000) 41 #define PLIC_MCLAIM(hart) (PLIC + 0x200004 + (hart)*0x2000) 42 #define PLIC_SCLAIM(hart) (PLIC + 0x201004 + (hart)*0x2000) 43 44 // the kernel expects there to be RAM 45 // for use by the kernel and user pages 46 // from physical address 0x80000000 to PHYSTOP. 47 #define KERNBASE 0x80000000L 48 #define PHYSTOP (KERNBASE + 128*1024*1024) 49 50 // map the trampoline page to the highest address, 51 // in both user and kernel space. 52 #define TRAMPOLINE (MAXVA - PGSIZE) 53 54 // map kernel stacks beneath the trampoline, 55 // each surrounded by invalid guard pages. 56 #define KSTACK(p) (TRAMPOLINE - ((p)+1)* 2*PGSIZE) 57 58 // User memory layout. 59 // Address zero first: 60 // text 61 // original data and bss 62 // fixed-size stack 63 // expandable heap 64 // ... 65 // TRAPFRAME (p->trapframe, used by the trampoline) 66 // TRAMPOLINE (the same page as in the kernel) 67 #define TRAPFRAME (TRAMPOLINE - PGSIZE)